Synthesis and application of porous semi-conductors

Porous silicon (PS) is a nanostructured material, able to answer nomad electronic requirements: high density power sources, high efficiency analogic functions… It is formed by electrochemical etching (anodic dissolution) of crystalline silicon wafers in hydrofluoric acid based electrolytes. According to the substrate doping, the crystalline orientation, the electrolyte composition and temperature or the anodisation conditions (applied current, duration, etc…), various morphologies can be achieved. The pore dimensions vary from a few nanometers to several micrometers (Figure 1).

Figure 1: Porous silicon classification, from microporous to macroporous in function of the average pore diameter (Ø).

Research on porous silicon in GREMAN has led to more than 60 papers and 6 patents since 2003. Based on these results, a start-up (SILIMIXT) directed by Laurent Ventura, former GREMAN researcher, was created. 

Our lab seeks to develop new applications of this material in microelectronics devices (electric isolation under RF devices, anisotropic structures by electromechanical etching for 3D devices, electrical isolation around AC switches electrochemical etching of wide band gap semi-conductors) or energy micro-sources (PS hydrogen diffusion layers for Proton Exchange Membrane micro Fuel Cells, PS ion conducting membranes for glucose PEMFC, Si nanowires and PS for Lithium Micro-batteries).

Some recent example of achievements involving porous silicon can be mentioned. The highest specific surface area ever measured for porous silicon (1125 m²/g) was reached using new HF electrolyte compositions [A. Loni et al., in J. of Solid State Science & Technology, Vol. 4, No 8, pp. P289-P292, 2015]. These particles are highly photoluminescent (Figure 2). This work was performed in collaboration with PSimedica (UK) and Pr Michael Sailor’s group in San Diego.

Figure 2: Photoluminescence of PS particles under UV light.

The first realization of a hybrid porous silicon/silicon substrate for RF applications was achieved [M. Capelle et al., in Appl. Phys. Lett. 104 pp. 072104-1-4, 2014]. This work was done in collaboration with STMicroelectronics Tours (Figure 3). These substrates lead to significant performance enhancement.


Figure 3: RF circuits prototypes integrated on silicon / PS hybrid substrates. a) Common mode filter and ESD protection diode. b) Low pass filter and ESD protection diode. Components commercialized by STMicroelectronics.